Refimprove date February 2008 Image IMST414B G20S.JPG thumb T414 transputer chip Image Transputer Evaluation IMSB008 81.jpg thumb IMSB008 base platform with IMSB419 and IMSB404 modules mounted The transputer ... &sig EAAX9EKREoJgVvlDDyzzsg2CBpo The Transputer Family of Products , by Hamid R. Arabnia ref For some time in the late 1980s many considered the transputer to be the next great design for the future of computing. While Inmos and the transputer did not ultimately live up to this expectation, the transputer ... a single faster CPU design. The first transputer designs were due to David May computer scientist ... work on the T414 transputer. citation needed date June 2010 Design The transputer the name deriving from trans istor and com puter ref name aspinall cite journal title The Transputer journal The Microprocessor ...&pg PA343&lpg PA343&dq transputer transistor computer PPA343,M1 accessdate 2009 05 18 ref was the first ... earlier. Originally the plan was to make the transputer cost only a few dollars per unit. Inmos ... a single transputer would have all the circuitry needed to work by itself, a feature more commonly ..., bus support and even an RTOS were all built in. Architecture The original transputer used ... the architecture generic. ref Stakem, Patrick H. The Hardware and Software Architecture of the Transputer ... of these they wanted so it could be argued that the transputer actually ran at 80 MHz ... generation scan testing so they fell out of favour for later designs. Links The basic design of the transputer ... that could be built in this fashion. Since each transputer was linked to another in a fixed point to point layout, sending messages to a more distant transputer required the messages to be relayed ... booted over the network links as opposed to the memory as in most machines so a single transputer could start up the entire network. There was a pin called BootFromROM that when asserted caused the transputer ... transputer. After a peek which required an address or a poke which took a word address, and a word ... more details
ABAQ redirects here. ABAQ is also the callsign for TV station ABQ in Alpha, Queensland. The Atari Transputer Workstation also known as ATW 800 , or simply ATW was a workstation class computer released by Atari Corporation in the late 1980s, based on the INMOS transputer . Sales were almost non existent, and the product was canceled after only a few hundred had been produced. History In 1986 Tim King ref http www.tim king.com Tim King ref left his job at MetaComCo , along with a few other employees, to start Perihelion Software in England. There they started development of a new parallel processing ... Hardware to create a new transputer based workstation that would run HeliOS. While at MetaComCo ... name ram1 Ram Meenakshisundaram, http www.classiccmp.org transputer rtu atw800.htm Ram s Totally Unofficial Atari Transputer Workstation 800 Pages ref Two versions were shown at the time one was a card ... 33&st 1 Abaq ATW Transputer 800 , image shows the unreleased single card solution ref The external card ... consisted of three main parts the main motherboard containing a T800 20 transputer and 4MB of Random ... connected using the transputer s 20 Mbit s processor links. The motherboard also contained ... management unit MMU on the transputer. This is not quite the issue it might seem, as the transputer ... for the DRAM refresh, although the transputer included such hardware internally. Image ... Atw farmcard.jpg Farmcard gallery References reflist External links http www.classiccmp.org transputer ... transputer.html Atari Transputer at Atarimuseum.com http www.classiccmp.org transputer atw800.htm Atari transputer Workstation 800 Data Sheet http spirit.lboro.ac.uk emulator.html Transputer emulator It emulates a single T414 transputer i.e. no FPU, no blitting instructions and supplies the file and terminal ... Transputer Workstation manuals Atari hardware Category Computer workstations Category Atari Transputer hr Atari Transputer Workstation pl Atari Transputer Workstation ... more details
architecture, becoming lead architect of the transputer and designer of the associated programming ... to Inmos. The prototype of the transputer was called the Simple 42 and was completed in 1982 . The first production transputers, the transputer T212 and transputer T414 , followed in 1985 the transputer T800 floating point transputer in 1987 . May initiated the design of one of the first VLSI packet switch es, the C104 , together with the communications system of the transputer T9000 transputer. Working closely with Tony Hoare and the Programming Research Group at Oxford University , May introduced formal verification techniques into the design of the transputer T800 floating point unit and the transputer T9000 transputer. These were some of the earliest uses of formal verification ... http www.cs.bris.ac.uk dave transputer.html David May s Transputer Page DBLP id May David References ... more details
Merge to computational RAM date July 2011 A Processor in memory PIM refers to a CPU computer processor CPU tightly coupled to computer memory memory , generally on the same Integrated circuit silicon chip . The chief goal of merging the processing and memory components in this way is to reduce memory latency and increase Bandwidth computing bandwidth . Alternatively reducing the distance that data needs to be moved reduces the power requirements of a system. Much of the complexity and hence power consumption in current processors stems from strategies to deal with avoiding memory stalls. Examples In the 1980s, a tiny CPU that executed FORTH was fabricated into a DRAM chip to improve PUSH and POP. FORTH is a Stack oriented programming language and this improved its efficiency. The Transputer also had large on chip memory given that it was made in the early 1980s making it essentially a Processor in memory. Notable PIM projects include the University of California, Berkeley http iram.cs.berkeley.edu IRAM project or the University of Notre Dame http www.nd.edu pim PIM effort. External links http www.classiccmp.org transputer Transputer Category Computer architecture comp sci stub ... more details
Perihelion Software Limited was a United Kingdom company founded in 1986 by Dr. Tim King along with a number of colleagues who had all worked together at MetaComCo on AmigaOS and written compiler s for both the Amiga and the Atari ST . Perihelion Software produced an operating system for the INMOS INMOS Transputer Transputer called HeliOS . This was a system that looked like Unix but which could pass messages to processes running on either the same Central processing unit processor or another one. This was used in the Atari Transputer Workstation , among other places. Later HeliOS was porting ported to other processors including the ARM architecture . Perihelion Software also produced an in memory database system called Polyhedra DBMS Polyhedra . The group responsible for this product was set up as a subsidiary, Perihelion Technology Limited PTL , which did a management buyout in 1994. PTL later changed its name to Polyhedra plc in 1995, and in 2001 was acquired by a Sweden Swedish company called ENEA AB ENEA . External links http www.tim king.com Dr. Tim King s Homepage Category Software companies of the United Kingdom ru Perihelion Software ... more details
Priority level or priority , in the Telecommunications Service Priority system , is the level that may be assigned to an NS EP telecommunications service, which level specifies the order in which provisioning or circuit restoration restoration of the service is to occur relative to other NS EP or non NS EP telecommunication services. Note Priority levels authorized are designated highest to lowest E, 1, 2, 3, 4, and 5 for provisioning and 1, 2, 3, 4, and 5 for restoration. References FS1037C See also INMOS Transputer Priority Category Telecommunications ... more details
The Interpolated Spread or I spread or ISPRD is the difference between the yield to maturity of the Bond finance bond and the linearly interpolated yield to the same maturity on an appropriate reference curve. ref http www.classiccmp.org transputer finengineer 5BLehman 20Brothers, 20O Kane 5D 20Credit 20Spreads 20Explained.pdf Credit Spreads Explained ref See also Option adjusted spread Z spread References Reflist DEFAULTSORT I Spread Category Bonds Bond market Econ stub ... more details
The transterpreter , a transputer interpreter ref http www.transterpreter.org ref ref http www.cs.kent.ac.uk research groups sys tvm.html ref ref http citeseerx.ist.psu.edu viewdoc download?doi 10.1.1.78.2672&rep rep1&type pdf The transtepreter a transputer interpreter ref is a virtual machine for occam pi ref http www.occam pi.org ref designed for education ref http portal.acm.org citation.cfm?id 1047485 ref and research in concurrency and robotics . The transterpreter was developed at the University of Kent . The transterpeter has made it possible to easily run occam pi programs on platforms such as the Lego Mindstorms RCX, Arduino , IA 32 , SPARC , MIPS architecture MIPS , and the Cell microprocessor Cell BE on Linux , Mac OS X , Microsoft Windows Windows and DOS . See also KRoC occam pi References reflist Category Virtual machines Category University of Kent Category Programming language implementation Category Concurrent programming languages ... more details
. The system was based on the INMOS transputer microprocessor , later also using SPARC and Intel i860 ... boards were produced with different transputer variants, RAM capacities and peripherals. The initial ... Occam Programming System , Meiko s version of INMOS s D700 Transputer Development System. This was soon ... computer software daemon called SVCS Sun Virtual Computing Surfaces provided access between the transputer network and the Sun host. As the performance of the transputer became less competitive towards the end of the 1980s the follow on T9000 transputer being beset with delays Meiko added the ability .... These were usually used as front end host processors for transputer or i860 Computing Surfaces. SVCS, or an improved version, called simply VCS was used to manage the transputer resources. Computing ... transputer operating system developed for the Computing Surface during the late 1980s. MeikOS was derived .... Unlike HeliOS , another Unix like transputer operating system, MeikOS was essentially a single processor ..., codenamed Elan Elite, was started due to the massive delays in the T9000 Transputer from ... more details
Thomson now STMicroelectronics . Around the same time, work was started on an enhanced transputer ... abandoned, signalling the end of the development of the transputer as a parallel processing platform. However, transputer derivatives such as the ST20 were later incorporated into chipsets for embedded ... Saga . Quorum Books. ISBN 978 0899301655 . External links Inmos and the transputer http www.cs.man.ac.uk ... more details
Refimprove date October 2011 KRoC , the Kent Retargetable occam Compiler , is an Occam programming language occam implementation that is based on the INMOS occam 2.1 compiler as a front end and a retargetable back end to produce machine code for various microprocessor s. Ports of the compiler have been made for PowerPC , SPARC , x86 and DEC Alpha Alpha processors. Along with the translation to different processors, the KRoC team have modified the compiler significantly, creating a compiler for what has become known as occam v2.5, and now as occam pi . Originally the translation from the occam compiler front end was by interpretation of the ASCII assembly language file. This worked reasonably well but was slow and occasionally inconvenient. The current KRoC compiler target is an Extended Transputer Code ETC , which is then translated into the target machine language. ETC code can be viewed as a kind of byte code it is a compact description of the compiler s intent on a Virtual Machine that is similar to the transputer . ETC code variants of the KRoC compiler exist for Intel x86 on Linux , x86 on Microsoft Windows Windows using Cygwin , and a SPARC port is in the works. See also http www.cs.kent.ac.uk projects ofa kroc KRoC Homepage http www.wotug.org kroc KRoC Page at WoTUG.Org http frmb.org occ21 extensions.html Dr. Fred Barnes KRoC page http transterpreter.org Transterpreter virtual machine for occam which executes an ETC based bytecode http occam pi.org occam pi programming language official site Category Compilers Category University of Kent ... more details
ATW may refer to Access 31 , a former Perth television station with callsign ATW, now replaced by West TV Accelerator Transmutation of Waste According to Wikipedia , useful for when arguing on the internet Air Transport World , magazine American Theatre Wing Characters of Kingdom Hearts DiZ Ansem the Wise , a character from the Kingdom Hearts series Arriva Trains Wales , a train operating company in the United Kingdom Atari Transputer Workstation , computer Atlantic and Western Railway ATW Assembly & Test Worldwide Outagamie County Regional Airport IATA airport code ATW in Appleton, Wisconsin, United States. Arthur Theodore Wright disambig fr ATW it ATW ... more details
Biot or BIOT may refer to Biot, Alpes Maritimes , a commune in France Biot crater , a lunar crater British Indian Ocean Territory Camille Biot 1850 1918 , French physician Biot s breathing refers to an abnormal pattern of breathing characterized by groups of quick, shallow inspirations followed by regular or irregular periods of apnea. Jean Baptiste Biot 1774 1862 , French physicist and mathematician Biot number , a dimensionless number used in heat transfer calculations Another name for the abampere , a unit of current, named after him Maurice Anthony Biot 1905 1985 , Belgian American physicist Biological robot , a term used in the novel Rendezvous with Rama and its sequels, and later adopted by the authors of The New Jedi Order see also Cyborg Biological Optical Transputer Systems, robots in the Phantom 2040 animated series Biot, a fictional world in the DC Comics universe see Manhunters comics disambig ca Biot de Biot fr Biot it Biot nl Biot ja pms Biot pl Biot scn Biot ... more details
development of a parallel operating system, initially targeted at the INMOS Transputer series ... system for Transputer systems. It supported products from various manufacturers including INMOS TRAM ..., and the Telmat T.Node. The Atari Transputer Workstation was perhaps the highest profile HeliOS ... www.classiccmp.org transputer Ram Meenakshisundaram s Transputer Home Page unix like Category Unix ... more details
lowercase occam In computer science , occam or occam pi is the name of a variant of the Occam programming language occam programming language developed by the Kent Retargetable occam Compiler KRoC team at the University of Kent . ref name kroc cite web url http www.cs.kent.ac.uk projects ofa kroc title occam pi blending the best of CSP and the pi calculus author Fred Barnes and Peter Welch date 2006 01 14 accessdate 2006 11 24 ref The name reflects the introduction of elements of the Pi calculus calculus into occam, particularly concepts involving Mobile agent mobile processes and data. The language contains a significant number of extensions to occam 2.1, including Nested protocols Run time process creation Mobile channels, data, and processes Recursion computer science Recursion Protocol inheritance Array Constructor computer science constructors Extended Synchronous rendezvous rendezvous See also Occam programming language Transputer KRoC Transterpreter References See http en.wikipedia.org wiki Wikipedia Footnotes for tips on adding references using ref tags Reflist External links http occam pi.org The occam programming language http projects.cs.kent.ac.uk projects tock trac Tock Occam compiler Category Concurrent programming languages Category University of Kent Compu lang stub comp sci stub ... more details
Original research date April 2011 Minimal Instruction Set Computer MISC is a Microprocessor processor architecture with a very small number of basic operations and corresponding opcode s. Such instruction set s are commonly stack based rather than register based to reduce the size of operand specifiers. Such a stack machine architecture is inherently simpler since all instructions operate on the top most stack entries. A result of this is a smaller instruction set, a smaller and faster instruction decode unit, and overall faster operation of individual instructions. The disadvantage is that instructions tend to have more sequential dependencies, reducing instruction level parallelism . MISC architectures have much in common with the Forth programming language and the Java Virtual Machine . Probably the most commercially successful MISC was the INMOS transputer . See also Portal Computer science External links http www.ultratechnology.com chips.htm Forth MISC chip designs http www.intellasys.net index.php?option com content&task view&id 35 seaForth 24 the next to latest multi core MISC design from Chuck Moore http greenarraychips.com Green Arrays the latest multi core MISC design from Chuck Moore http www.rdrop.com cary html minimal instruction set.html MISC variants Category Instruction processing Category Central processing unit compu hardware stub CPU technologies el Minimal instruction set computer fr Minimal instruction set computer it Minimal instruction set computer pl MISC ru MISC simple Minimal instruction set computer ... more details
Notability date March 2008 Software Defined Silicon is a computer chip technology created by XMOS of Bristol ref http www.xmos.com XMOS Semiconductor Bot generated title ref . XMOS was jointly founded in 2005 by INMOS transputer architect David May computer scientist David May . Software Defined Silicon ref http www.eetimes.com showArticle.jhtml?articleID 200900650 EETimes.com Multicore startup tips software defined silicon Bot generated title ref ref http www.embeddedtechjournal.com articles 2007 20070710 silicon.htm Software Defined Silicon Bot generated title ref ref http www.electronicsweekly.com Articles 2008 01 18 42953 software defined silicon is way ahead says xmos founder.htm Software defined silicon is way ahead, says XMOS founder Bot generated title ref ref http www.embedded computing.com news db ?9453 XMOS unveils first Software Defined Silicon Bot generated title ref ref http www.siliconfutures.com Silicon Futures Parallelism and Software Defined Silicon Blog Bot generated title ref is the name given to the family of multithreaded multicore on chip processors that XMOS is developing. References Reflist Category Microprocessors hardware stub ... more details
Gabriel Kron s Diakoptics Greek dia &ndash through kopto &ndash cut,tear or Method of Tearing involves breaking a usually physical problem down into subproblems which can be solved independently before being joined back together to obtain a solution to the whole problem. Gabriel Kron was an unconventional Engineer who worked for GE in the US until his death in 1968. He was responsible for the first load flow electricity distribution system in New York. He was perhaps most famous for his Method of Tearing, a technique for splitting up physical problems into subproblems, solving each individual subproblem and then recombining to give an unexpectedly exact overall solution. The technique is efficient on sequential computers, but is particularly so on parallel architectures. Whether this holds for quantum parallelism is as yet unknown. It is peculiar as a decomposition method, in that it involves taking values on the intersection layer the boundary between subsystems into account. The method has been rediscovered by the parallel processing community recently under the name Domain Decomposition . A multilevel hierarchical version of the Method, in which the subsystems are recursively torn into subsubsystems etc., was published by Keith Bowden in 1991. References Bowden K, Kron s Method of Tearing on a Transputer Array , The Computer Journal, Vol 33, No 5, 1990, pp 453 459. Bowden K, Hierarchical Tearing An Efficient Holographic Algorithm for System Decomposition , International Journal of General Systems, 24 1 , pp 23 38, 1991. Kron G, Diakoptics The Piecewise Solution of Large Scale Systems , MacDonald, 1963. Lai C H, Diakoptics, Domain Decomposition and Parallel Computing , The Computer Journal, Vol 37, No 10, pp. 840 846 See also Software componentry software eng stub Category Software engineering ... more details
Unreferenced date December 2009 The G364 framebuffer was a line of graphics adapter s using the SGS Thomson INMOS G364 chipset, produced by INMOS known for their transputer and eventually acquired by SGS Thomson and incorporated into STMicroelectronics in the early 1990s. The G364 included a RAMDAC and a 64 bit interface to Video RAM VRAM graphical memory to implement a framebuffer , but did not include any hardware based graphical acceleration other than a hardware cursor function. The G364 was largely similar in design and functionality to the G300 framebuffer , but had a 64 bit VRAM interface instead of the slower 32 bit interface of the lower price G300. The INMOS G364 is quite similar to the G332 found on the DECstation Personal DECstation 5000 Series Personal DECstation . Although the G364 was capable of providing comparatively high resolution output up to 1600× 1200 pixels at 8 bits per pixel, in many cases typically achieved only in Unix computer workstation workstations such as those of Sun Microsystems or Silicon Graphics SGI , it was not a popular chipset for the personal computer manufacturers of the early 1990s and was not adopted by any major workstation manufacturers. The G364 framebuffer found use in an after market Commodore Amiga graphics card, and as the primary graphics system sold with the MIPS Magnum MIPS Magnum 4000 series of MIPS architecture MIPS based Windows NT workstations. Amiga cards based on the G364 EGS SPECTRUM 110 24 Rainbow III Visiona Paint G300 See also Framebuffer Graphics card Graphics processing unit Amiga hardware DEFAULTSORT Inmos G364 Framebuffer Category Video cards Category Advanced RISC Computing Category Amiga ... more details
Programming paradigms Process oriented programming is a programming paradigm that separates the concerns of data structures and the concurrent processes that act upon them. The data structures in this case are typically persistent, complex, and large scale the subject of general purpose applications, as opposed to specialized processing of specialized data sets seen in high productivity applications HPC . The model allows the creation of large scale applications that partially share common data sets. Programs are functionally decomposed into parallel processes that create and act upon logically shared data. The paradigm was originally invented for parallel computers in the 1980s, especially computers built with transputer microprocessors by INMOS , or similar architectures. It evolved to meet deficiencies in the message passing paradigm of Occam programming language Occam and enable uniform efficiency when porting applications between distributed memory and shared memory parallel computers. The first example of the paradigm appears in the programming language Ease programming language Ease designed at Yale University ref name process cite paper last Ericsson Zenith title Programming with Ease Semiotic definition of the language publisher Yale University, Computer Science Technical Report YALEU DCS RR 809 date 1990 ref ref name process2 cite book last Ericsson Zenith title Process Interaction Models publisher Paris University date 1992 ref in 1990. Similar models have appeared since in the loose combination of SQL databases and objected oriented languages such as Java programming language Java , often referred to as object relational models and widely used in large scale distributed systems today. The paradigm is likely to appear on desktop computers as microprocessors increase the number of processors Multi core processor multicore per chip. See also Massively parallel processing Parallel computing Multi core computing Multi core References Reflist External links ht ... more details
The Edinburgh Concurrent Supercomputer ECS was a large Meiko Computing Surface supercomputer . This transputer based, massively parallel system was installed at the University of Edinburgh during the late 1980s and early 1990s. History Following a pilot project involving an early 40 transputer Computing Surface installed in April 1986, funding was obtained from Science and Engineering Research Council SERC and the Department of Trade and Industry United Kingdom DTI for a much larger system using T800 transputers and a MicroVAX fileserver . The Edinburgh Concurrent Supercomputer Project ECSP was formed to manage and support the facility, which was commissioned at the end of 1987. Over the next few years, the system received several upgrades, including more transputers reaching, at its peak, around 400 processors and the installation of M VCS and MeikOS system software, which enabled multi user access and removed the need for the MicroVAX. In 1990, the Edinburgh Concurrent Supercomputer Project was succeeded by the Edinburgh Parallel Computing Centre , which consolidated the project with other parallel computing resources and activities within the University. The ECS continued to be used for a variety of academic and commercial research work. In October 1992 the ECS was reconfigured as a SPARC hosted Computing Surface with three SPARC host processors running SunOS and around 380 T800s. The system was finally decommissioned in August 1994. References Wallace, D J. Supercomputing with Transputers , Computing Systems in Engineering , Volume 1, Issue 1, 1990, Pages 131 141, http dx.doi.org 10.1016 0956 0521 90 90052 M doi 10.1016 0956 0521 90 90052 M , Pergamon Press, Inc. Elmsford, NY, USA http www2.epcc.ed.ac.uk archive publications newsletters archive news 24 news 24www 1.html HEADING25 Brown, Mike. The Edinburgh Concurrent Supercomputer an appreciation , EPCC News , No.24, 1994. External links http www.epcc.ed.ac.uk about us history EPCC History page super compu stub Category ... more details
Myriade is a Europe European Miniaturized satellite satellite bus platform developed by EADS Astrium and CNES . EADS Astrium offers the Myriade bus under the commercial name Astrosat 100 . Description Myriade satellites are cube shaped, measuring 60cm along one side, and weigh between 100 and 200 kg. The control system is a Transputer T805 with 1 Gigabit of memory and capable of 5 Million instructions per second MIPS . It is interfaced via i2c to FPGA and PIC microcontroller PIC microcontrollers that control onboard equipment. Power is provided by one steerable Gallium arsenide solar array . Communication is by two S band transceivers , offering downlink rates of up to 400 kbit s, and an optional X band system with downlink rates of 18 72 Mbit s. First Myriade satellites The first Myriade based system was Demeter satellite Demeter Detection of Electro Magnetic Emissions Transmitted from Earthquake Regions , launched in June 2004. Since then, missions have included PARASOL , a French built Earth observing research satellite, launched in December 2004 Essaim satellite Essaim , a France French military reconnaissance Miniaturized satellite microsatellite Satellite constellation constellation , also launched in December 2004 Spirale , a demonstrator system which includes two 120 kilograms 260 lb microsatellites, launched in February 2009 MICROSCOPE Picard satellite Picard , dedicated to the simultaneous measurement of the absolute total and spectral solar irradiance, the diameter and solar shape, and to the Sun s interior probing launched in June 2010 ELISA Satellite ELISA ELISA 1, ELISA 2, ELISA 3 and ELISA 4 are a suite of French military satellites launched on December 17 2011. References http www.eoportal.org directory pres MyriadeCNESMicrosatelliteProgram.html http adsabs.harvard.edu full 2004ESASP.571E...4T Category Satellites fr Myriade satellite ja MYRIADE ... more details
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