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The ARM Cortex-A15 MPCore is a multicore ARM architecture processor providing an out-of-order superscalar pipeline ARM v7 instruction set running at up to 2.5 GHz.[1] ARM has confirmed that the Cortex A15 core is 40 percent faster than the Cortex-A9 core, all things being equal.[2] The first A15 designs taped out in the fall of 2011, but products based on the chip are not expected in the market until 2012.[3] Features Key features of the Cortex-A15 core are: - 40-bit Large Physical Address Extensions (LPAE) addressing up to 1 TB of RAM.[4][5]
- 15 stage integer / 17-25 stage floating point pipeline, with out-of-order speculative issue 3-way superscalar execution pipeline.[6]
- 4 cores per cluster, up to 2 clusters per chip with CoreLink 400 (an AMBA-4 coherent interconnect). ARM provides specifications but the foundries individually design ARM chips, and AMBA-4 scales beyond 2 clusters.
- DSP and NEON SIMD extensions onboard (per core).
- VFPv4 Floating Point Unit onboard (per core).
- Hardware virtualization support.
- Thumb-2 instruction set encoding reduces the size of programs with little impact on performance.
- TrustZone security extensions.
- Jazelle RCT for JIT compilation.
- Program Trace Macrocell and CoreSight Design Kit for unobtrusive tracing of instruction execution.
- 32kB data + 32kB instruction L1 cache per core.
- Integrated low-latency level-2 cache controller, up to 4 MB per cluster.
Implementations Implementations are only expected to sample in 2011, and none are expected to market before 2012 or 2013. Press announcements of forthcoming implementations: Other licensees, such as LG[13][14], are expected to produce an A15 based design at some point. See also References External links - Official ARM Links
zh:ARM Cortex-A15 MPCore
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